Why L1 and L2 cache?

Discussion in 'OT Technology' started by tstrandh, Apr 28, 2003.

  1. tstrandh

    tstrandh New Member

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    Since L1 and L2 cache are both mounted on the processor, what is the point to having both? Could they just make one cache that is 640KB?
     
  2. 5Gen_Prelude

    5Gen_Prelude There might not be an "I" in the word "Team", but

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    I'm gonna give an uneducated guess and say one has a faster access time, while the other has more memory - best of both worlds.

    This is called the Supra TT theory... ;)

    IBsomeonepointsoutmisguidedpremise
     
  3. tstrandh

    tstrandh New Member

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    L2 cache is usually larger than L1, but they are both SRAM, so I'm really not sure.

    One question though: is there still a backside bus with the L2 cache mounted on the processor, or is that the point - to eliminate the BSB?
     

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